FPGA Virtex-5 FXT Family 65nm Technology 1V 1738Pin FCBGA
XC5VFX130T-1FF1738C информация о продукте
The Xilinx® Virtex® UltraScale+™ FPGAs are available in -3, -2, -1 speed grades, with -3E devices having the highest performance. The -2LE devices can operate at a VCCINT voltage at 0.85V or 0.72V and provide lower maximum static power. When operated at VCCINT = 0.85V, using -2LE devices, the speed specification for the L devices is the same as the -2I speed grade. When operated at VCCINT = 0.72V, the -2LE performance and static and dynamic power is reduced.
DC and AC characteristics are specified in extended (E), industrial (I), and military (M) temperature ranges. Except the operating temperature range or unless otherwise noted, all the DC and AC electrical parameters are the same for a particular speed grade (that is, the timing characteristics of a -1 speed grade extended device are the same as for a -1 speed grade industrial device). However, only selected speed grades and/or devices are available in each temperature range.
- Absolute Maximum Ratings
- Recommended Operating Conditions
- DC Characteristics Over Recommended Operating Conditions
- Quiescent Supply Current
The recommended power-on sequence is VCCINT, VCCINT_IO/VCCBRAM, VCCAUX/VCCAUX_IO, and VCCO to achieve minimum current draw and ensure that the I/Os are 3-stated at power-on. The recommended power-off sequence is the reverse of the power-on sequence. If VCCINT and VCCINT_IO/VCCBRAM have the same recommended voltage levels, they can be powered by the same supply and ramped simultaneously. VCCINT_IO must be connected to VCCBRAM. If VCCAUX/VCCAUX_IO and VCCO have the same recommended voltage levels, they can be powered by the same supply and ramped simultaneously. VCCAUX and VCCAUX_IO must be connected together. VCCADC and VREF can be powered at any time and have no power-up sequencing requirements.
For devices with HBM, the HBM power supplies can be powered on/off after or in-parallel with the core power supplies. The required power-on sequence is VCCAUX_HBM and VCCINT_IO followed by VCC_HBM/VCC_IO_HBM. VCC_IO_HBM must be connected to VCC_HBM. VCCAUX_HBM must be equal to or higher than VCC_HBM at all times.
The recommended power-off sequence is the reverse of the power-on sequence. The recommended power-on sequence to achieve minimum current draw for the GTY or GTM transceivers is VCCINT, VCCINT_GT, VMGTAVCC, VMGTAVTT OR VMGTAVCC, VCCINT, VCCINT_GT, VMGTAVTT. There is no recommended sequencing for VMGTVCCAUX. Both VMGTAVCC and VCCINT can be ramped simultaneously. When VCCINT and VCCINT_GT have the same recommended operating conditions, VCCINT and VCCINT_GT can be connected to the same power regulation circuit. When VCCINT and VCCINT_GT are connected to separate regulation circuits, VCCINT_GT must be within the recommended operating condition before device configuration.The recommended power-off sequence is the reverse of the power-on sequence to achieve minimum current draw. If these recommended sequences are not met, current drawn from VMGTAVTT can be higher than specifications during power-up and power-down.
- Number of LABs/CLBs
- Number of Logic Elements/Cells
- Total RAM Bits
- Number of I/O
- Voltage Supply
- 0.95V ~ 1.05V
- Mounting Type
- Surface Mount
- Operating Temperature
- 0??C ~ 85??C (TJ)
- Package / Case
- 1738-BBGA, FCBGA
- Supplier Device Package
- 1738-FCBGA (42.5x42.5)
XC5VFX130T User Guide PDF Datasheet
XC5VFX130T-1FF1738C Связанные специальные
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Estimated Delivery Time: Dec 08 - Dec 13 days (choose Expedited at checkout).
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Step2: Vacuum Packaging
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Step4: Individual Packaging
Step5: Packaging Boxes
Step6: Bar-Code Shipping Tag
All the products will packing in anti-staticbag. Ship with ESD antistatic protection.
Outside ESD packing’s lable will use ourcompany’s information: Part Mumber, Brand and Quantity.
We will inspect all the goods before shipment,ensure all the products at good condition and ensure the parts are new originalmatch datasheet.
After all the goods are ensure no problems afterpacking, we will packing safely and send by global express. It exhibitsexcellent puncture and tear resistance along with good seal integrity.
1.The electronic components you purchase include 365 Days Warranty, We guarantee product quality.
2.If some of the items you received aren't of perfect quality, we would resiponsibly arrange your refund or replacement. But the items must remain their orginal condition.
- Q: How does Jotrin guarantee that XC5VFX130T-1FF1738C is the original manufacturer or agent of XILINX?
- We have a professional business development department to strictly test and verify the qualifications of XILINX original manufacturers and agents. All XILINX suppliers must pass the qualification review before they can publish their XC5VFX130T-1FF1738C devices; we pay more attention to the channels and quality of XC5VFX130T-1FF1738C products than any other customer. We strictly implement supplier audits, so you can purchase with confidence.
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- Q: What is the process for returns or replacement of XC5VFX130T-1FF1738C?
All goods will implement Pre-Shipment Inspection (PSI), selected at random from all batches of your order to do a systematic inspection before arranging the shipment.
If there is something wrong with the XC5VFX130T1FF1738C we delivered, we will accept the replacement or return of the XC5VFX130T-1FF1738C only when all of the below conditions are fulfilled:
(1)Such as a deficiency in quantity, delivery of wrong items, and apparent external defects (breakage and rust, etc.), and we acknowledge such problems.
(2)We are informed of the defect described above within 90 days after the delivery of XC5VFX130T-1FF1738C.
(3)The XC5VFX130T-1FF1738C is unused and only in the original unpacked packaging.
Two processes to return the products:
(1)Inform us within 90 days
(2)Obtain Requesting Return Authorizations
More details about return electronic components please see our Return & Change Policy.
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AMD Xilinx, Inc
- 1.About the Spartan-7 of Xilinx FPGA Family
- 2.Xilinx FPGA naming conventions
- 3.Xilinx-FPGA DNA reading method
- 4.Xilinx-7Series-FPGA high-speed transceiver use learning
- 5.FPGAs, 3D ICs, and MPSoCs suit LTE Advanced applications
- 6.Development Environment supports SoCs and MPSoCs.
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