Bus bars suit high- performance switching

Components that can connect circuits while minimizing inductance are useful for a number of applications, but are becoming a particular necessity for high-performance switching applications using modern semiconductors. The fundamental purpose of a bus bar, like a wire or cable, is to connect two or more points of a circuit, which is a straightforward matter.

However, bus bars also offer many additional advantages over conventional cables. One such benefit is that a bus bar assembly can be manufactured so that it minimizes stray circuit inductance while making all required component connections. We will look at a common cause of reduced efficiency and unexpected component failure and how a low-inductance laminated multilayer bus bar helps to mitigate these negative results.

Bus bars have paved the way for many advances in the market today. We know that semiconductor designers are continually improving their technology with higher voltage ratings, lower conduction losses and faster switching speeds for devices like MOSFETs, IGBTs, and diodes. These products have evolved considerably and are performing at levels one could only imagine 10 to 15 years ago, but the application of these performance gains, in particular switching speed, would not be possible without bus bars.

Typical apps

In a motor drive, converter or other typical switching application, energy stored in a circuit’s “stray” inductance will be realized in the form of an overshooting voltage spike added to the dc bus voltage and felt across the IGBT at the time of turn-off (see Fig. 1). This overshoot voltage is proportional to the rate-of-change-of-current (di/dt) and the amount of stray inductance (L) in the circuit, supporting the formula V = L*di/dt.

For example, in a circuit having a stray inductance of 100 nH, turning off an IGBT having a 50-ns fall time from 125 A (typical for modern 600-V IGBTs and equaling a di/dt of roughly 2,000 A/µs) will result in an overshoot of the bus voltage by about 200 V (200 V = 100 nH * 2,000 A/µs). If we assume a 450-V bus voltage, the additional 200-V overshoot experienced at turn-off makes the total voltage to be supported by the IGBT approach 650 V. If a 600-V IGBT was planned for the application, typical for 450-V applications, this level of circuit reactance would be disastrous for the IGBT.

Fig. 1. Typical voltage spike across an IGBT at turn-off.

In this scenario, the circuit designer has several options. He or she could increase the IGBT gate resistance (RG) and reduce the turn-off di/dt. This would reduce the overshoot voltage but also increase the turn-off loss and not take full advantage of the new semiconductor technology. Alternatively, the designer could select a higher-voltage IGBT, but higher-voltage IGBTs have greater on-state voltage (VCE(sat)) and therefore, increased conduction loss. Ironically, higher-voltage IGBTs also have slower switching speeds than their lower voltage peers; as a consequence, the overshoot voltage will likely be reduced to some degree. However, the slower switching speed will result in an increased turn-off loss (EOFF), again compromising circuit efficiency.

A diode in the same circuit will experience a similar voltage increase when it is reverse biased as a result of turning an IGBT on elsewhere in the circuit. In this instance, the voltage rating will be exceeded and, assuming survival, the resulting reverse recovery loss will increase due to the spike voltage. If the IGBT turn-on is slowed or a higher-voltage diode is selected, the designer will be faced with similar efficiency tradeoffs as those explained for the IGBT.

To reach efficiency and minimize cooling requirements, a designer should use an IGBT with the lowest voltage rating allowed by safety margins and cost. Such an option would presumably also have the lowest VCE(sat) and fastest switching speeds. Of course, safety margins must be designed into every circuit; therefore, devices having voltage ratings appropriately greater than the bus voltage should always be selected. Also, the circuit designer must keep in mind the mandate to minimize stray inductance to fully capitalize on the semiconductor’s performance potential.

A laminated multilayer bus bar similar to the one shown in Fig. 2 is an effective choice for minimizing circuit stray inductance. With this solution, the capacitors and IGBT modules are closely connected to the conductors of the bus bar. These are usually made of copper and plated with Sn, Ni, or another metal to improve connection integrity and slow oxidation.

Component terminal offsets are compensated for with bushings or formed areas of the bus bar conductors themselves. The formed and plated conductors are then laminated together, separated by a thin layer or multiple layers of material having a high dielectric strength such as Mylar or Nomex.

Fig. 2. A typical laminated multilayer bus bar to minimize stray inductance.

If the conductors are properly shaped and routed so that current flows equally and in the opposite direction through each, their opposing magnetic fields will effectively cancel each other. The closer the conductors are together, the greater the cancellation effect. Therefore, the dielectric material selected should be as thin as possible while still having a dielectric strength appropriately in excess of the application voltage, resulting in little added circuit inductance.

The majority of the remaining circuit inductance is typically due to the leads and internal lead connection of the bus capacitors. However, depending on the capacitors selected, a bus bar alone may or may not result in a sufficiently low enough total circuit inductance.

If necessary, the circuit designer may include additional ultra-low-inductance bypass capacitors in parallel with the primary bus capacitors and in close vicinity of or directly across the IGBT terminals (C1-E2), yet again lowering circuit inductance. Designers typically refer to these components as snubber capacitors, but they are more accurately being used in a bypass role.

We should also note that some inductance can be attributed to the IGBT packaging itself. Many modern semiconductor packages employ miniature versions of multilayer bus bars internally, as most semiconductor designers are keenly aware of the detrimental effects of stray inductance. These professionals therefore make every possible adjustment to reduce stray inductance in their packaging.

Bus bars are not typically viewed as cutting-edge technology and often go unnoticed.. Far ahead of the functionality of wires or

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